Job Details:

Job Description:

We are seeking a highly skilled and experienced Cache Senior Design Engineer to join our IP Design team and play a major role in ensuring the quality and functionality of our cutting-edge products for the AI industry, Habana group within Intel.

Role Description:
The Senior IP Design Engineer will be responsible for designing and implementing IP solutions, collaborating with cross-functional teams, and ensuring the quality and performance of IP designs.

Qualifications:

• B.Sc. in Electrical Engineering or Computer Engineering.
• At least 10 years of proven experience in Block Level design.
• At least 3 years of proven experience in Cache systems.
• Backend-RTL relevant skills: solving timing paths, restructuring components, area reduction.
• System Verilog – must.
• Soft skills like communication, teamwork, Ownership, accountability , etc.
• Strong analytical and problem-solving skills.

This position is expected to change location in the near future to the Petah Tikva campus

Job Type:

Experienced Hire

Shift:

Shift 1 (Israel)

Primary Location:

Israel, Tel Aviv

Additional Locations:

Business group:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.