Job Details:

Job Description:

Intel Data Center Group (DCG) team delivers best-in-class Ethernet products and is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing devices.
DCG's compelling Ethernet products move the world's data and are the foundations of cloud service and telecommunications data centers.
You will be exposed to High-Speed I/O protocols such as PCIe, DDR5, and PAM4 Ethernet, which are a part of our Ethernet Infrastructure Processing Unit (Intel IPU) and Foundation NIC (FNIC) Ethernet product lines.
We propose a dynamic and flexible workplace position, working directly with highly capable design, system, and pre/post-silicon teams within the organization.

Most of our team's engineers have 10+ years of experience, and we are looking for a skilled multidisciplinary student with a proven experience in software code development in various languages to join our contribution in next division projects' challenges and be part of the Ethernet networking marketing accelerated growth.

In this role, you will be focusing on:

• FPGA code development: Design and implement digital logic modules using Verilog for Altera (Intel) FPGAs using the Quartus Prime environment.

• Embedded Programming: Write and debug C/C++ code for embedded processors (such as Nios V or ARM HPS) to interface with custom hardware logic.

• Test Automation: Develop Python scripts to automate data collection, perform hardware-in-the-loop (HIL) testing, and analyze performance metrics.

• Verification: Create Verilog testbenches and use tools like ModelSim/Questa to simulate and verify logic functionality before deployment.

• Hardware Debugging: Utilize Signal-Tap logic analyzers and standard lab equipment (oscilloscopes, multimeters) to troubleshoot physical hardware.

Qualifications:

• Education: Currently pursuing a M.sc (preferred) or Bsc. in Electrical Engineering

• Availability for Minimum 3 working days a week from the office

• Minimum 3 semesters to graduation

• Hardware: Proficiency in Verilog (preferred) or VHDL, with an understanding of synchronous design and timing constraints.

• Programming: Strong foundational knowledge in C/C++ for embedded systems and Python for scripting/automation.

• Tools: Familiarity with the Intel/Altera Quartus ecosystem and Platform Designer (Qsys).

• Lab Experience: Familiarity with lab test equipment and test environment.

• Mindset: A "hardware-first" mentality with the ability to read schematics and understand register maps.

Job Type:

Student / Intern

Shift:

Shift 1 (Israel)

Primary Location:

Israel, Petah-Tikva

Additional Locations:

Business group:

At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*